Verification engineers (M/F)
Fluent in English to consolidate our growth and be part of the one the newest and hottest tech adventure in Europe.
Job can be based in France: Paris area, Maisons-Laffitte, Saclay, Grenoble and Sophia-Antipolis or in Germany: Duisburg.
- Read and analyze the system requirement and architecture requirement documents
- Build the verification plan for the assigned IP or subsystem(s)
- Manage the verification plans, and execute part of them if needed
- Work with external verification resources while in the meantime preparing for the verification team building
- Work with IP design and chip integration teams locally or remotely
This job may need small trips to our other R&D sites (Paris, Grenoble, Sophia-Antipolis).
You are or you have:
- 8 years of digital HDL design or integration
- 3 years of digital design verification using SystemVerilog
- Senior experience of coverage based verification and use of verification IPs
- Experience of using verification management tools
- (Preferred) Experience in PCIe, DDR and HBM interface verification
- (Optional) Experience of AMBA and Arm IP designs
You are motivated by an experience within an industrial startup with fast growth and high visibility, having access to top notch silicon technology (beyond 7nm), all under a very competitive international environment.
To be defined depending on experience.
Send Resume and cover letter to firstname.lastname@example.org
Please mention the job reference: #20209