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Nous recherchons les meilleurs talents en informatique en développement de semi-conducteurs digitaux, logiciels pour calcul haute performance, automobile...

Senior Digital designer for HDL Design (M/F)

  • 23 Mars 2021 - Ref: #202104
With you, we are going to launch the microprocessor with high computing power and energy efficiency that will enable Europeto assert its leadership and technological independence in strategic applications of intensive computing such as energy, climatology, medical research, defence, artificial intelligence...

Description du poste :
You are motivated by an experience within an industrial startup with fast growth and high visibility, having access to top notch silicon technology (beyond 7nm), all under a very competitive international environment.

SiPearl is looking for Senior Digital designer within the hardware team. Reporting to the design team manager, you will oversee this :

Read and analyse the system requirement and architecture requirement documents

Work with architecture team to mature the design specifications for further implementation

Coding in HDL to implement desired functions based on design specifications

Design or integrate the testbench for design verification

Generate design report to detail functions and behaviour

Generate application guide for h/w and s/w integration

Work with integration teams to participate in design integration

Work with model teams to build model of the design and get it integrated

Work with verification teams to verify the design with module-test or system-level-test

Work with firmware teams support developing firmware and drivers

Packaging the design into IP for future reuse

Guide and review the junior in the team as the mentor


Job can be based in France : Paris area, Maisons-Laffitte, and Sophia-Antipolis or in Germany at Duisburg.

Vous êtes :
You are or you have :

At least 8 years of digital HDL design (experience field experience in HDL functional design and verification)

Experience of designing in Verilog and SystemVerilog

Experience of using IPXACT

Experience of using Synopsys DesignWare and Arm IPs

Experience of implementing chiptop required reset and clocking logics

Experienced in either Trace & Debug or DFT implementation


Profile :

Someone adaptable

Autonomous

Excellent oral and writing English communication


Conditions et Avantages :
Fixed part: To be defined depending on experience.
Variable part: variable part depending on the achievement of objectives

Contact :
Envoyer CV et lettre de candidature à cv@sipearl.com
en mentionnant la référence de l'annonce : #202104
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